Abstract

Due to their weak received signal power, Global Positioning System (GPS) signals are vulnerable to radio frequency interference. Adaptive beam and null steering of the gain pattern of a GPS antenna array can significantly increase the resistance of GPS sensors to signal interference and jamming. Since adaptive array processing requires intensive computational power, beamsteering GPS receivers were usually implemented using hardware such as field-programmable gate arrays (FPGAs). However, a software implementation using general-purpose processors is much more desirable because of its flexibility and cost effectiveness. This paper presents a GPS software-defined radio (SDR) with adaptive beamsteering capability for anti-jam applications. The GPS SDR design is based on an optimized desktop parallel processing architecture using a quad-core Central Processing Unit (CPU) coupled with a new generation Graphics Processing Unit (GPU) having massively parallel processors. This GPS SDR demonstrates sufficient computational capability to support a four-element antenna array and future GPS L5 signal processing in real time. After providing the details of our design and optimization schemes for future GPU-based GPS SDR developments, the jamming resistance of our GPS SDR under synthetic wideband jamming is presented. Since the GPS SDR uses commercial-off-the-shelf hardware and processors, it can be easily adopted in civil GPS applications requiring anti-jam capabilities.

Highlights

  • Since Global Navigation Satellite System (GNSS) sensors (e.g., Global Positioning System or GPS of the US [1,2], Galileo of Europe, GLONASS of Russia, and Compass of China) are widely used in many fields, including navigation, surveillance and precise timing, their vulnerability to radio frequency interference (RFI) is drawing significant attention

  • The aforementioned optimization strategies may not be beneficial to our Graphics Processing Unit (GPU) kernel, we can further improve the performance of our GPS software-defined radio (SDR) by utilizing the Central Processing Unit (CPU) more efficiently

  • In order to increase the jamming resistance of GPS sensors, we have designed a GPS SDR for a four-element controlled reception pattern antenna (CRPA) array. This GPS SDR is capable of real-time beamsteering toward 12 GPS

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Summary

Introduction

Since Global Navigation Satellite System (GNSS) sensors (e.g., Global Positioning System or GPS of the US [1,2], Galileo of Europe, GLONASS of Russia, and Compass of China) are widely used in many fields, including navigation, surveillance and precise timing, their vulnerability to radio frequency interference (RFI) is drawing significant attention. Knezevic et al [32] developed an 8-channel GPS SDR capable of processing 40 Msps and 8-bit resolution data in real time using a single-core 3.0 GHz CPU and an NVIDIA GeForce 8800 GTX. Cailun et al [34] stated that they developed a GPS SDR running 150 channels with 5 Msps and 14-bit resolution data using an Intel Xeon 5150 CPU and an NVIDIA GeForce GTX 285 GPU, their paper does not present the design details. All these developments in [32,33,34] utilized GPUs for correlation operations for code tracking.

GPS SDR Architecture for CRPA Processing and Computational Challenges
Hardware Setup
GPU-Based Parallel Correlator
Memory Space on a CUDA Device
Data Copy and Synthesis for Beamforming
Carrier and Code Wipeoff
Parallel Reduction in Reallocated Shared Memory
Hardware Parallelism
Optimization Considerations
Anti-Jam Capability of GPS SDR for CRPA
Findings
Conclusions

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