A radiation-hardened 32-bit microprocessor based on the commercial CMOS process

Abstract

A radiation-hardened 32-bit microprocessor based on the commercial CMOS process, usable up to 1 kGy(Si), has been developed by (1) adding a silicon nitride passivation layer and (2) thinning the field oxide. Both techniques suppress the leakage current generated by the parasitic MOSFET, because its negative threshold voltage shift due to oxide trapped holes is decreased by the latter, and compensated by the positive shift due to the interface states generated during irradiation by hydrogen trapped in the oxide through the silicon-nitride deposition. The samples supplied with 4.5 V and 20 MHz clock were able to operate normally up to the total dose of 1.3 kGy(Si). The total dose tolerance of the samples was over 20 times as much as that of ones based on the commercial process.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>