Abstract
A nuclear fusion reactor requires a radiation-hardened sensor readout integrated circuit (IC), whose operation should be tolerant against harsh radiation effects up to MGy or higher. This paper proposes radiation-hardening circuit design techniques for an instrumentation amplifier (IA), which is one of the most sensitive circuits in the sensor readout IC. The paper studied design considerations for choosing the IA topology for radiation environments and proposes a radiation-hardened IA structure with total-ionizing-dose (TID) effect monitoring and adaptive reference control functions. The radiation-hardened performance of the proposed IA was verified through model-based circuit simulations by using compact transistor models that reflected the TID effects into complementary metal–oxide–semiconductor (CMOS) parameters. The proposed IA was designed with the 65 nm standard CMOS process and provides adjustable voltage gain between 3 and 15, bandwidth up to 400 kHz, and power consumption of 34.6 μW, while maintaining a stable performance over TID effects up to 1 MGy.
Highlights
Radiation effects on electronic components are critical issues in various fields, such as space, medical imaging, and nuclear applications
Silicon-based transistors in integrated circuit (IC), such as complementary metal–oxide–semiconductor (CMOS) and bipolar junction transistor (BJT), can be and degrade the circuit performance. These radiation effects on transistors can be categorized into affected by electrons, protons, and neutrons in radiation environments, which change the transistor three effects, i.e., total ionizing dose (TID), single event effect (SEE), and displacement damage (DD), parameters and degrade the circuit performance
We propose a radiation-hardened instrumentation amplifier (IA) structure, which adopts the three-op-amp topology and fully-differential structure, while employing TID effect monitoring, Vth -insensitive current generator, and adaptive reference control
Summary
Radiation effects on electronic components are critical issues in various fields, such as space, medical imaging, and nuclear applications. Silicon-based transistors in ICs, such as CMOS and bipolar junction transistor (BJT), can be and degrade the circuit performance These radiation effects on transistors can be categorized into affected by electrons, protons, and neutrons in radiation environments, which change the transistor three effects, i.e., total ionizing dose (TID), single event effect (SEE), and displacement damage (DD), parameters and degrade the circuit performance. To accurately reproduce radiation effects on CMOS transistors, we utilized the compact transistor models, whose parameters were degraded by TID and applied those compact models to SPICE circuit simulations. This compact model-based simulation methodology enables the precise estimation of the IA performance before conducting experiments in actual radiation environments.
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