Abstract
A quadrature digital power amplifier (PA) with hybrid Doherty and impedance boosting (HDIB) technique is presented for deep power back-off (PBO) efficiency enhancement in the complex domain. Less power-combining ways and dc power supplies are required for proposed PA comparing to previously reported works with deep PBO efficiency enhancement. A reconfigurable matching network (RMN) based on a novel reconfigurable transformer is proposed with more freedom to achieve a flexible load impedance tuning range of the sub-PAs. The characteristics of the reconfigurable transformer based on tunable inductors are analyzed. Efficiency enhancement is achieved at 3-/6-/9-/12-/15-dB PBOs without any supply switching or PA short-switches. The PA is fabricated in 40-nm CMOS technology with a core size of 0.83 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . Operating at 2.3-3.4 GHz, it introduces 24.2-dBm peak P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">out</sub> with 38.5% peak drain efficiency (DE) at 2.8 GHz. It achieves 38.5%/29.6%/18.4% at 2.8 GHz and 34.7%/26.6%/17.8% DE at 3.3 GHz for 0-/6-/12-dB PBO, 39.3%/29.5%/14.9% at 2.8 GHz, and 35.3%/27.9%/15.9% DE at 3.3 GHz for 3-/9-/15-dB PBO, respectively. For 10-MHz 256-QAM modulation signal, it delivers 16.22-/15.50-dBm average P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">out</sub> with EVM of -32.3/-33.0 dB, average DE of 24.6%/22.7%, and ACLR of -33.20/-31.54 dBc at 2.8/3.3 GHz, respectively. For 20-MHz 64 QAM modulation signal, it exhibits 16.42-/15.52-dBm average P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">out</sub> with EVM of -29.1/-29.3 dB, average DE of 24.9%/22.78%, and ACLR of -30.78/-30.74 dBc at 2.8/3.3 GHz, respectively.
Highlights
T HE increasing data throughput of wireless communication systems favors spectral-efficiency modulation signals with high peak-to-average-power ratios (PAPRs)
We propose a quadrature digital power amplifiers (PAs) [40] with a hybrid Doherty and impedance boosting (HDIB) technique for deep power back-off (PBO) efficiency enhancement in the complex domain
The proposed quadrature digital PA with HDIB is fabricated in 40-nm CMOS technology with a total size of 1.42 × 1.46 mm2
Summary
T HE increasing data throughput of wireless communication systems favors spectral-efficiency modulation signals with high peak-to-average-power ratios (PAPRs). Digital polar architecture is often used in available techniques with PBO enhancement due to its flexibility with digital controlled output power and high energy efficiency It adopts a complex coordinate rotation digital computer (CORDIC) for Cartesian-to-polar conversion and phase modulator (PM) compared to the quadrature digital PA. Digital quadrature PA [33]–[39] exhibits a simple structure without PM, CORDIC, and delay synchronization issues, which has a potential advantage for high data-rate transmission It is still challenging for the efficiency enhancement at deep PBOs in the complex domain for existing techniques. We propose a quadrature digital PA [40] with a hybrid Doherty and impedance boosting (HDIB) technique for deep PBO efficiency enhancement in the complex domain It achieves efficiency peaks at 3-/6-/9-/12-/15-dB PBO over 2.3–3.4 GHz without supply switching or switches to short the sub-PA output.
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