A PVT tolerant low power wide tuning range differential voltage controlled oscillator design in 90 nm CMOS technology

Abstract

This paper presents a three-stage low power and wider tuning range differential ring-oscillator with dual control voltages. This design permits lower tuning gain using dual control voltage (VTUNE 1 and VTUNE 2) to achieve high operation frequency. The dual voltage control enables a large bias current into the circuit. The proposed DRO has been implemented in 90 nm CMOS technology, whose performance results show a very high output frequency range which includes lower frequency band (LFB) and higher frequency band (HFB) from 0.007 GHz to 13.48 GHz. This DRO shows power consumption from 0.001 mW to 2.307 mW and phase noise of −92.27 dBc/Hz @ 1MHz offset. The figure of merit (FoM) for this DRO turns out to be −179.98 dBc/Hz. In addition, process corner analysis, Monte Carlo analysis, temperature sweep analysis, and stability analysis has been performed to find the robustness of the circuit.