Abstract

We introduced the novel porous low-k material with k~2.3 improved the physical properties for intermetal dielectric application in high speed memory device. Because this low-k material has both Si-H and Si-CH <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> bonds in its SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> film, it reduced the bowing and adhesion failure of P-HSQ and P-MSQ at via profile and metal wire. As this material was applied at device, the parasitic capacitance between metal wires was reduced till 20% compared with that of the HSQ

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