A Proposed Architecture for Polarization-Switching D/A Converter (PDAC)

Abstract

The integration of ferroelectric capacitors with very large-scale integrated (VLSI) circuits on semiconductor wafers has been commercially viable for about one and a half decades. The primary applications of ferroelectric integrated circuits have been oriented to non-volatile memories and Gigabit dynamic random access memories (DRAMs). One potential application for ferroelectric capacitors is polarization-switching digital-to-analog converters (PDACs). In principle, PDACs make use of ferroelectric switching; i.e., spontaneous polarization is used as a new medium for data conversion other than the conventional conversion media such as voltage, current and charge. PDACs are analogous to charge-redistribution data converters that make use of charge and are implemented with normal linear capacitors. In addition to using a novel data-conversion medium, polarization-switching data converters require a novel architecture for circuit implementation. Presented here is a proposed architecture for PDACs. SPICE simulations verify the functionality of an 8-bit bipolar PDAC.