A Programmable Multiple Frequencies Clock Generator With Process and Temperature Compensation Circuit for System on Chip Design

Abstract

This article presents a programmable multiple frequencies clock generator with a process and temperature compensation circuit design. The proposed clock generator can achieve a stable and wide frequency range output for a single input frequency by using digital control codes as well as process and temperature compensation mechanisms. In our approach, the first step is to adjust the duty-cycle of the input clock by using a digitally controlled pulsewidth modulator (DCPWM) to generate an output clock signal with a duty-cycle of 20% to 80%. Second, the various duty-cycle clock outputs of the DCPWM are integrated by the duty-cycle-to-voltage converter to generate analog voltage signals to control the succeeding voltage-controlled ring oscillator (VCO). Through the use of various control voltages, different VCO output frequencies are generated. Finally, by using the process and temperature compensation circuit, the proposed clock generator can provide a stable and wide frequency range. The proposed chip is fabricated in a 180-nm CMOS process and has an output frequency range of 35–138 MHz at a supply voltage of 0.9 V. At 120 MHz, the power dissipation and rms jitter are 224.3 μW and 7.84 ps, respectively. The active area of the chip is 0.62 mm × 0.76 mm.