Abstract

This paper presents an improved DC-offset cancellation (DCOC) circuit for programmable-gain amplifier (PGA) in power line communication. It is a speed-enhanced and low-noisy method by using current-mode feedback. The output DC-offset can be reduced from several hundred millivolts to less than 5mV over 64 dB gain range. Furthermore, this proposed technique does not bring in excessive design complexity or large chip area by reusing master-slave configuration that already existed in the system. The circuit is designed in 0.18µm CMOS technology.

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