Abstract
A low power process/temperature variation-tolerant CMOS received signal strength indicator (RSSI) and limiter amplifier are designed using SMIC 0.13 μm CMOS technology. The limiter uses six-stage amplifier architecture for minimum power consideration. The RSSI has a dynamic range of more than 60 dB, and the RSSI linearity error is within ±0.5 dB for an input power from −65 to −8 dBm. The RSSI output voltage is from 0.15 to 1 V and the slope of the curve is 14.17 mV/dB. Furthermore, with the compensation circuit, the proposed RSSI shows good temperature independence and robustness against process variation characteristics. The RSSI with an integrated AGC loop draws 1.5 mA (I and Q paths) from a 1.2 V single supply.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
