Abstract
There are few reports of systematic study of impurities and defects in Si epilayers grown by MBE. For Si-MBE technology to advance to production statu, there is an urgent need for an assessment of the impurity levels and extended and point defects in the epilayers, and the development of tchniques to reduce these to acceptable levels for discrete device and VLSI compatibility. We have embarked on a programme which addresses these areas and have made use of NAA, DLTS and SIMS. The possible sources of contamination (especially metallic) and their investigation will be discussed. Various methods for reducing extended defect densities have also been tried. These include the use of diffirent chemical pre-cleans, and in situ Si flux cleaning. We have also carried out studies on the use of a tightly collimated Si beam for deposition in an attempt to reduce particulate contamination levels in the layers.
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