A Predictive Dispatching Rule Assisted by Multi-Layer Perceptron for Scheduling Wafer Fabrication Lines

Abstract

Abstract Reentrant flow plays an important role for the allocation of limited resources in semiconductor manufacturing. In particular, over- or under-loading of workstations may deteriorate performances of the whole production line. Therefore, load balancing is usually accomplished with dispatching rules to balance the workload to enhance production performance. Focus on the realistic needs, a novel prediction-based dynamic scheduling method with a multi-layer perceptron (MLP) is proposed for load balancing. This study proposed MLP based on the simulation dataset of empirical industrial fabrication facilities as the prediction model. The prediction outputs incorporated into the dynamic dispatching rule (DDR) for optimal load balancing based on the queue length at each workstation, named as a dynamic scheduling method considering load balancing (DSMLB). Based on the validation, DSMLB compared with the state-of-the-art dispatching rules shows that DSMLB has improved the daily movement, equipment utilization (EU), throughput rate, and cycle time (CT).