Abstract
As modern ASIC technologies suffer from substantial delay uncertainties, delay insensitive (DI) communication protocols are receiving increasing attention. Among these, the more energy-saving 2-phase protocols are most attractive. In the literature such protocols are widely covered already, with Level-Encoded-Dual-Rail (LEDR), Level-Encoded-Transition-Signalling (LETS) and Transition Encoding (TranEnc). For the designer, however, it remains difficult to pick the right one, as the discussions in the literature are restricted to the respective protocol at hand, and implementations for the required interfaces are often missing. This paper provides a thorough comparison of existing DI 2-phase protocols with respect to speed, power and coding efficiency, that also encompasses the practical implementation. We propose efficient solutions for the required completion detection and conversion circuits and compare their static power- and dynamic energy consumptions as well as the conversion times through Spice simulations.
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