A power efficient and constant-g<inf>m</inf> 1.8 V CMOS operational transconductance amplifier with rail-to-rail input and output ranges for charge pump in phase-locked loop

Abstract

This paper presents a power efficient and constant-g m 1.8 V CMOS operational transconductance amplifier with rail-to-rail input and output ranges implemented in 180 nm CMOS process technology. The op-amp consists of constant-g m rail-to-rail input stage, folded cascode summing stage and class AB output stage. This operational transconductance amplifier provides a dc gain of 60.49dB, phase margin 59.64°, and unity gain frequency 538.3MHz while driving a 1pF capacitance and power consumption is 2.13mW from a 1.8 V power supply. It is simply a compound structure, consists of NMOS and PMOS differential pairs are connected in parallel. The compound structure achieves rail-to-rail operation; however, it produces variations of the transconductance 6.5 % and dc gain varies from 57dB–60.50dB over the input common mode range. This paper discusses sources and solutions for the transconductance variations using 1∶3 current mirror techniques.