A Pixel Readout Circuit for Hybrid SDD and CMOS Technology

Abstract

In this paper a pixel readout circuit for a hybrid structure of silicon drift detectors (SDD) and CMOS technology is designed. The purpose of this circuit is to realize the reading and processing of the time, energy and position of X-ray pulse. X-ray detectors can be used for deep space navigation or high-energy particle detection. The system includes a charge sensitive amplifier (CSA), a peak hold circuit (PHD), a voltage comparator, and an edge generation circuit, etc., to realize the analog readout reflecting the X-ray energy amplitude information and the output of the pulse reflecting the X-ray hitting time. The 40×50 pixel-readout array circuit is implemented in 0.13µm CMOS technology. The simulation results show that when the parasitic capacitance of the SDD sensitive node is controlled within 50fF, the equivalent noise charge (ENC) of CSA is 36e-, and CSA has a good linearity. The “time walk” of the voltage pulse front that reflects the hit time is within 16ns, which means that time discrimination is achieved. With a power supply voltage of 1.5V, the power current of the entire pixel unit is 14.8µA. The power consumption of the chip is 45.5mW.