A Phase-Based Self-Tuning Algorithm for Reconfigurable Cache

Abstract

The performance of a given cache architecture is largely determined by the behavior of the application using the cache. Reconfigurable cache is an effective low-power technique. Using the technique, microprocessor's cache can be configured dynamically to adapt itself to the requirement of running program, and minimize the energy consumption and performance loss. We introduce a phase-based self-tuning algorithm (PBSTA), which can automatically, transparently, and dynamically manage the reconfigurable cache on a per-phase basis. In contrast with previous works, the algorithm seeks not only to lower the cache's energy consumption effectively, but also reduce the performance loss due to unnecessary reconfigurations. By simulating numerous MiBench benchmarks, the results show that the PBSTA, when applied to reconfigurable cache, saves on average 40% of total memory access energy compared with a conventional cache and the associated performance loss is close to 1.8%.