A Parallel Tempering Approach for Efficient Exploration of the Verification Tradespace in Engineered Systems

Abstract

Verification is a critical process in the development of engineered systems. Through verification, engineers gain confidence in the correct functionality of the system before it is deployed into operation. Traditionally, verification strategies are fixed at the beginning of the system’s development and verification activities (VAs) are executed as the development progresses. Such an approach appears to give inferior results as the selection of the VAs does not leverage information gained through the system’s development process. In contrast, a set-based design (SBD) approach to verification, where VAs are dynamically selected as the system’s development progresses, has been shown to provide superior results. However, its application under realistic engineering scenarios remains unproven due to the large size of the verification tradespace. In this work, we propose a parallel tempering approach (PTA) to efficiently explore the verification tradespace. First, we formulate an exploration of the verification tradespace as a tree search problem. Second, we design a parallel tempering (PT) algorithm by simulating several replicas of the verification process at different temperatures to obtain a near-optimal result. Third, We apply the PT algorithm to all possible verification states to dynamically identify near-optimal results. The effectiveness of the proposed PTA is evaluated on a partial model of a notional satellite optical instrument.