A Novel Top-Down Fabrication Process for Vertically-Stacked Silicon-Nanowire Array

Kangil Kim,Jae Keun Lee,Seung Ju Han,Sangmin Lee

doi:10.3390/app10031146

Abstract

Silicon nanowires are widely used for sensing applications due to their outstanding mechanical, electrical, and optical properties. However, one of the major challenges involves introducing silicon-nanowire arrays to a specific layout location with reproducible and controllable dimensions. Indeed, for integration with microscale structures and circuits, a monolithic wafer-level process based on a top-down silicon-nanowire array fabrication method is essential. For sensors in various electromechanical and photoelectric applications, the need for silicon nanowires (as a functional building block) is increasing, and thus monolithic integration is highly required. In this paper, a novel top-down method for fabricating vertically-stacked silicon-nanowire arrays is presented. This method enables the fabrication of lateral silicon-nanowire arrays in a vertical direction, as well as the fabrication of an increased number of silicon nanowires on a finite dimension. The proposed fabrication method uses a number of processes: photolithography, deep reactive-ion etching, and wet oxidation. In applying the proposed method, a vertically-aligned silicon-nanowire array, in which a single layer consists of three vertical layers with 20 silicon nanowires, is fabricated and analyzed. The diamond-shaped cross-sectional dimension of a single silicon nanowire is approximately 300 nm in width and 20 μm in length. The developed method is expected to result in highly-sensitive, reproducible, and low-cost silicon-nanowire sensors for various biomedical applications.

Highlights

Silicon nanowires are widely used for sensing applications due to their outstanding mechanical, electrical, and optical properties
If the to produce thermal oxide; the silicon nanowires are fabricated under a protrusion structure, width of the support is too narrow, or if the support does not form, the thermal oxide layer will while the vertical layers are isolated by the insulation layers
The most critical stepThe of wet the for deep reactive-ion etching (DRIE), the purpose is to nanowires with aTherefore, width of approximately proposed fabrication method is the process, especially the isotropic-silicon etching step, which oxidation rate of the furnace used in this process is approximately 50 Å/min to form nanostructures, determines the scallop size.is performed for about 70 min to isolate each layer by completely oxidizing and the oxidation process

Summary

Introduction

Silicon nanowires are widely used for sensing applications due to their outstanding mechanical, electrical, and optical properties. Many researchers have reported nanostructure fabrication using metal-assisted chemical etching processes [16,17,18] This is a method to fabricate nanostructures of vertically-aligned structures by patterning metal on the substrate. This method enables the fabrication of lateral silicon-nanowire arrays in a vertical direction, thereby enabling an increased number of silicon nanowires on a finite dimension, which, in turn, results in increased sensitivity and dynamic range. The number and dimensions of the silicon nanowires are determined according to the DRIE-process conditions and the wet-oxidation process times; it is possible to fabricate multiple silicon nanowires at a single location by UV lithography. The remainder of this paper explains the detailed monolithic-fabrication process of vertically-stacked silicon-nanowire arrays This is followed by a dimensional and structural analysis of the fabrication results in relation to the specific process steps.

Fabrication

Fabrication Results

Experimental

Discussion and Conclusions