Abstract
In this paper, a novel time-multiplexed fully differential (TMFD) interface ASIC with strong non-linear suppression is presented. The interface ASIC adopts the half-bridge measurement method and two single-end charge amplifiers in the novel C-V converter instead of the conventional full-bridge sensing structure. The C-V converter can greatly suppress the influence of the common-mode voltage by declining the gain of virtual ground node for charge transfer. As a result, the non-linearity of the front-end circuit decreases obviously due to the low common-mode disturbance. This research also proposes a TMFD SC PGA with continuous output to suppress the fluctuation caused by discrete signals from conventional SC PGA. The readout circuit chip was implemented in a 1P3M 0.18μm CMOS process. The operating frequency reaches 200kHz with a power consumption of 2.5mA from a 3.3V power supply. Due to the strong non-linear suppression capability of the proposed interface ASIC, the measuring sensitivity of the accelerometer achieved 0.530 V/g with only a DC non-linearity of 0.08%. The experimental results at different operating temperature indicates that the presented readout ASIC performs great temperature stability. The temperature sensitivity ratio reduces to 0.008‰/K. The experimental results indicates that the non-linearity has reduced significantly compared with conventional readout chips.
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More From: IEEE Transactions on Instrumentation and Measurement
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