A Novel Technique for Resolver-to-Digital Conversion Using Principal Frequency Component S-Transform

Like He,Jiliang Yi

doi:10.1155/2019/3167687

Abstract

A novel technique for resolver-to-digital conversion (RDC) using principal frequency component S-transform (PFCST) is proposed in this paper. First, the mode envelope of two output signals of the resolver is extracted by PFCST. The envelope extracted by PFCST maintains the same time resolution as the original signal because it performs time-frequency conversion for each sampling point. Then, the quadrant of the resolver is determined by the judgment rule formed by the polarity of the optimum nonzero region of the signals, and the quadrant information is used to correct the arctangent to obtain the accurate rotor position. Finally, the simulations prove that the maximum angle error of the resolver estimated by this method occurs at the quadrant junction but does not exceed one deg., and the experiments are used to verify the effectiveness of the proposed method.

Highlights

As a position and speed sensor of rotating shaft, a resolver has the advantages of ruggedness, wide operating temperature, and restraining common mode noise
The two output signals of the resolver are generated by sinusoidal and cosine modulation of excitation, respectively, and it is not easy to obtain the exact position of the rotor position [2]
E existing resolver-to-digital conversion (RDC) methods can be divided into two categories: hardware-based and software-based [3]. e core of the hardware-based RDC method is to use a special decoding chip [4, 5]. is method has a high decoding accuracy, but the chip cost is high and the hardware design is complex. erefore, more and more researchers are seeking more flexible, convenient, and low-cost RDC methods. e implementation of RDC based on an FPGA (Field-Programmable Gate Array) chip has attracted much attention because it has the advantages of both hardware real time and software flexibility. e current controller and the decoding algorithm are incorporated into a single FPGA chip in [6]

Summary

Introduction

As a position and speed sensor of rotating shaft, a resolver has the advantages of ruggedness, wide operating temperature, and restraining common mode noise. E implementation of RDC based on an FPGA (Field-Programmable Gate Array) chip has attracted much attention because it has the advantages of both hardware real time and software flexibility. Software-based RDC methods of the resolver are usually implemented in the time domain [10] In this method, the peak point is usually used to extract the envelope of the signal, but this will cause the resolution of the envelope signal to decline, and the rotor position calculated by the sampled values is inaccurate in the highspeed region when the excitation frequency is relatively low [11]. Nonergodic S-transform (NEST), as a time-frequency analysis method, adopts the nonergodic spectrum calculation mode, inherits the intuitive and antinoise characteristics of S-transform, and reduces the computational load obviously. Because of the inherent filtering property of S-transform and the calculation of single-frequency components, the real time and accuracy of the proposed method can meet the requirements of the practical application, which has been verified by simulations and experiments

Principle of Resolver and PFCST

Simulations and Experiments