A Novel Switching Sequence for Asymmetrical 15-Level Packed U Cell Inverter Topology with Improved Total Harmonic Distortion

Abstract

Multilevel inverters (MLIs) have a major drawback of a utilizing more number of power semiconductor components (PSC), switching losses, increasing of voltage stress on the switches while going for higher level generations. In this work, drawbacks of conventional MLI topologies have been overcome through an advanced MLI topology called packed U cell (PUC). PUC-15 level MLI topology is developed by using lesser number of PSC, so that losses and voltage stress on switch is less when compared to conventional topologies. In this article, the novel switching sequence of PUC-15 topology is developed. It controls the switching stress due to its random switching operation. The PUC-15 switching sequence is controlled by using advanced sawtooth carrier- and triangular carrier- based multi-carrier sinusoidal pulse width modulation. The functionality of novel switching sequence and PWM techniques are confirmed via simulations, and results are compared in terms of total harmonic distortion (THD) at disparate modulation indexes. The measured FFT analysis of %THD is lesser than 5% which is under IEEE-519 standard for both voltage and current.