A Novel STT–SOT MTJ-Based Nonvolatile SRAM for Power Gating Applications

Abstract

This article proposes novel nonvolatile (NV) static random access memory (SRAM) circuits based on spin transfer torque (STT) and spin orbit torque (SOT) operated magnetic tunnel junction (MTJ) device for energy-efficient power gating circuits. In which, two different designs of 9T-2MTJs and 10T-2MTJ-based NV SRAM circuits are proposed for low power, high noise margin, and faster switching speed with less area overhead. The proposed architecture uses a smaller number of transistor combinations to accommodate low-power operation with compact cell size when compared with available pieces of literature. Also, the combination of nMOS and pMOS transistors in the proposed architecture enhances the driving capability of the circuit for both low and high input operations. Here, the electrical characteristics of the proposed designs have been compared and contrasted with the available 11T-2MTJ and 7T-2D-2MTJ non volatile static random access memory (NVSRAM) and 6T SRAM circuits using a UMC-40 nm design kit and physics-based STT–SOT MTJ Verilog-A Model. The proposed 9T-2MTJ-based NVSRAM was found to be a better alternative and offers improved performance in terms of higher restore noise margin and lower power consumption than other circuits reported at this node. Moreover, the studied 10T-2MTJ exhibits an improved write and hold noise margin than the proposed/available 9T/7T-2D/11T-2MTJ circuits.