A novel SOI-LDMOS with field plate auxiliary doping layer that has improved breakdown voltage

Abstract

Field plate (FP) is a widely used electric field optimization technique in lateral power devices. However, we found that the electric field distribution optimized by FP still has poor uniformity due to the excessive induced charges at the end of FP. To solve the problem, a novel silicon on insulator based lateral double diffused metal oxide semiconductor (SOI-LDMOS) with a field plate auxiliary doping layer (FPADL) is proposed. Our investigation proved that the FPADL introduces an additional part of space charge and partially balances the excessive induced charges at the end of FP. As a result, the FPADL introduces an additional electric field peak and improves the electric field distribution. Thereby, the SOI-LDMOS with FPADL has improved breakdown voltage (BV). The effect of FPADL is verified experimentally. In our experiment, the FPADL is realized by modifying the mask of buffer layer to avoid increasing the process cost. The measurement results showed that, comparing with the conventional SOI-LDMOS with FP, the proposed SOI-LDMOS with FPADL improved the BV by 9.52% with the on-resistance and the process cost maintained. Therefore, the proposed SOI-LDMOS with FPADL is a promising device.