A Novel SiC LDMOS with Electric Field Optimization by Step Doping Technology

Abstract

In this paper, a novel 4H-SiC double reduced surface field (RESURF) LDMOS with a one-step doped Ptop layer and a Pburried layer (SDP LDMOS) has been proposed to optimize the electric field distribution and enhance the breakdown voltage. By using the step doping (SD) technology, the Ptop layer and the Pburried layer introduced extra electric field peaks in the drift region, hence the lateral and the vertical electric field distributions have been optimized simultaneously and the breakdown voltage has been improved significantly. In addition, the Pburried layer facilitated the depletion of the drift region. Therefore, for similar breakdown voltage rating, higher doping concentration of the drift region and smaller specific on-resistance have been achieved. It was found by the finite element numeric simulation that the proposed device exhibited a high breakdown voltage (BV) of 1934 V and a low specific on-resistance (Ron,sp) of 4.04 mΩ·cm2 (at VGS = 10 V, VDS = 1 V), resulting in a 49% higher Baliga's figure of merit (FOM, defined as BV2/Ron,sp) 925.8 MW/cm2 than that of the conventional double RESURF LDMOS.