Abstract
A novel silicon retina chip based on the information processing in the vertebrate retina was designed and fabricated. The chip has a novel wiring structure in which all pixels are connected through the channel of MOS transistors, which simplifies a wiring structure compared with conventional resistive networks. The proposed structure minimizes the pixel area and certainly increases a fill factor since each pixel consists of only two photodiodes and three MOS transistors. Experimental results showed that the chip could extracted the edge of input images successfully. Furthermore, it was shown that the chip could operate over a wide range of light intensities by adjusting its spatial resolution.
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