Abstract

Ring oscillator (RO) based physical unclonable functions (PUF) is one of the widely used security primitive because of its simple architecture and ease of collecting responses. The oscillation frequency of RO section is used to derive the responses of PUF. The dependency of oscillation frequency on aging and temperature variation causes degradation in the reliability of PUF. Further, the quality factors of PUF depend upon the impact of process variation (PV). In this paper, we used dynamic logic style like feedthrough logic (FTL) in place of conventional static CMOS to design the RO in order to enhance its reliability and the use of FTL increases the impact of PV on RO section. Further, our proposed modified RO PUF architecture is suitable in low power and area constraint application. The quality factors analysis of the proposed modified RO PUF is carried out in 90 nm CMOS technology. Simulation results confirm higher reliability and improved power feature of proposed RO PUF architecture.

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