A novel recessed gate MESFET by embedded dielectric packet

Abstract

In this paper, a novel recessed gate MESFET transistor is presented by amending the depletion region. The main idea in this work is to improve the breakdown voltage and high frequency characteristics by altering the depletion region in the channel. The proposed structure consists of an embedded dielectric packet and a silicon well in the channel. We called the proposed structure an Embedded Dielectric Packet MESFET (EDP-MESFET). The RF and DC characteristics of the proposed structure are studied using numerical simulations. The proposed structure improves the breakdown voltage and the DC maximum output power 54.6 and 55.9%, respectively in comparison with a Conventional MESFET (C-MESFET). Also, the embedded dielectric packet of the proposed structure leads to deceasing the gate-source capacitance. Therefore, the maximum oscillation frequency $$(\textit{f}_{\mathrm{max}})$$ of the EDP-MESFET improves 13% in comparison with the C-MESFET structure. Our results attempts to show the superiority of the EDP-MESFET device over the conventional one, and it can be a good candidate for high voltage and high frequency applications.