Abstract
In this paper, a novel read scheme using gate-induced drain leakage (GIDL) current is proposed to suppress read disturbance in 3-D NAND flash memories. The proposed read scheme is demonstrated through the technology computer-aided design (TCAD) simulation. In the selected string, GIDL current is not generated due to the low potential difference. On the other hand, in the unselected string, holes are accumulated under the selected cell and potential of the selected cell is enhanced due to the GIDL current before the read operation. The potential differences between the selected and adjacent cells are decreased and maximum electric field (Em) is decreased. Therefore, soft programming in the selected cell during the read operation is decreased and hot carrier injection (HCI) between selected and adjacent cells is reduced completely. The proposed read scheme can be applied to high stacked WL layers over 200 layers.
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