A Novel Probability-Based Logic-Locking Technique: ProbLock

Michael Yue,Sara Tehranipoor

doi:10.3390/s21238126

Abstract

Integrated circuit (IC) piracy and overproduction are serious issues that threaten the security and integrity of a system. Logic locking is a type of hardware obfuscation technique where additional key gates are inserted into the circuit. Only the correct key can unlock the functionality of that circuit; otherwise, the system produces the wrong output. In an effort to hinder these threats on ICs, we have developed a probability-based logic-locking technique to protect the design of a circuit. Our proposed technique, called “ProbLock”, can be applied to both combinational and sequential circuits through a critical selection process. We used a filtering process to select the best location of key gates based on various constraints. Each step in the filtering process generates a subset of nodes for each constraint. We also analyzed the correlation between each constraint and adjusted the strength of the constraints before inserting key gates. We tested our algorithm on 40 benchmarks from the ISCAS ’85 and ISCAS ’89 suites. We evaluated ProbLock against a SAT attack and measured how long the attack took to successfully generate a key value. The SAT attack took longer for most benchmarks using ProbLock which proves viable security in hardware obfuscation.

Highlights

A Novel Probability-Based-LogicThe semiconductor industry is constantly changing from the production of Integrated circuit (IC) to the complexity of their design
The critical path constraint is similar to the longest path; rather than considering logic depth, we look at timing information
This would allow the filtering process from each constraint to generate a subset of nodes each time until only the best candidate nodes remained to be inserted

Summary

Introduction

A Novel Probability-Based-LogicThe semiconductor industry is constantly changing from the production of ICs to the complexity of their design. The industry has moved to a fabless model where most of the fabrication for a chip is outsourced to a less secure and less trusted environment. These environments include testing and fabrication facilities that are necessary for the pipeline. While this model improves production costs and development, it has led to the consequence of piracy, overproduction, and cloning. The chips are vulnerable to various attacks [1] that attempt to extract the design of the chip or other information from the device Due to these security issues, researchers have developed techniques to counter these attacks. One technique to improve the security of ICs is hardware obfuscation [2]

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