Abstract

In this brief, we present a novel pipelined algorithm for transposing non-square matrices and describe the corresponding architecture for this algorithm. In particular, the architecture is composed of a series of identical cascaded basic circuits and can be controlled via a simple control strategy based on several counters. The architecture is optimal in terms of both memory and latency and it achieves the theoretical minimums. Moreover, the proposed algorithm and architecture could be easily extended to N-parallel implementations for matrix transposition. This architecture supports matrices whose rows and columns are integer multiples; it is mainly used for radix- 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">s</sup> butterfly algorithms using matrix transpositions. Experimental results indicate that the proposed single-path architecture can reduce the computation cycles and circuit area by a factor of 9.18% and 5.87%, respectively, for a 32×16 matrix transposition computation, compared with those of a recently proposed state-of-the-art architecture for matrix transposition.

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