A novel parallel duty cycle control algorithm for photovoltaic voltage regulator system using FPGA

Abstract

In this paper, a novel parallel duty cycle control method is proposed to regulate the load voltage of the photo voltaic (PV) fed DC-DC buck converter. The proposed method concentrates on the control of PV fed DC-DC buck converter by fusing the two duty cycles from maximum power point tracking (MPPT) and digital proportional integral-digital pulse width modulation (DPI-DPWM) through the HDPWM algorithm. The fusion of the MPPT algorithms and DPI-DPWM algorithms achieve high precision in the voltage regulation of the PV fed DC-DC buck converter. The proposed parallel duty cycle control is passed through the HDPWM algorithm to compensate the high clocking frequency demand with the design resolution of 210 bits. Further, the design complexity of the HDPWM algorithm is reduced as the resolution of 210 bits is split as 25 and 25 bits for CDPWM and DDPWM respectively. The FPGA based implementation of the proposed parallel duty cycle method includes the synthesizable VHDL code for i) MPPT algorithms, ii) DPI-based DPWM algorithms, iii) Fusing of the MPPT-DPI-DPWM and iv) Passing the fused MPPT-DPI-DPWM through the HDPWM algorithm. The Xilinx Spartan 3A DSP, FPGA implementation is suitable for the proposed parallel duty cycle control method. The hardware results validate the satisfactory PV voltage regulation under continuous changing weather conditions. The transient response of INC-DPI-HDPWM seems to have a faster settling time compared to other MPPT-DPI-DPWM methods. Also, its FPGA implementation proves less area in design and low power consumption compared to the existing methods.