A Novel Nondestructive Bit-Line Discharging Scheme for Deep Submicrometer STT-RAMs

Abstract

A combination of semiconductor integrated circuits (IC) and a dense array of scaled magnetic tunnel junctions (MTJ) makes promising Spin-Transfer Torque Random Access Memory (STT-RAM). This emerging memory minimizes the leakage power consumption and provides a high density at scaled technologies. In this paper, we propose a novel non-destructive self-reference sensing scheme for STT-RAM. The proposed technique overcomes the large bit-to-bit variation of MTJ resistance. In the proposed scheme, the stored value in the STT-RAM cell preserves, hence, the long write-back operation is eliminated. Besides, the sensing scheme is accomplished in one step. In this scheme, the Bit-Line is pre-charged and then discharged during read operation. The MTJ resistance state can be found by comparing the time constant of discharging. The simulation results show the overall sensing time is 4 ns when the Bit-Line capacitance is equal to 200 fF.