Abstract

A novel nanofabrication technique which can produce highly controlled silicon-based nanostructures in wafer scale has been proposed using a simple amorphous silicon (α-Si) material as an etch mask. SiO2 nanostructures directly fabricated can serve as nanotemplates to transfer into the underlying substrates such as silicon, germanium, transistor gate, or other dielectric materials to form electrically functional nanostructures and devices. In this paper, two typical silicon-based nanostructures such as nanoline and nanofin have been successfully fabricated by this technique, demonstrating excellent etch performance. In addition, silicon nanostructures fabricated above can be further trimmed to less than 10 nm by combing with assisted post-treatment methods. The novel nanofabrication technique will be expected a new emerging technology with low process complexity and good compatibility with existing silicon integrated circuit and is an important step towards the easy fabrication of a wide variety of nanoelectronics, biosensors, and optoelectronic devices.

Highlights

  • Silicon-based nanostructures including Si and SiO2 are of great technological importance and considerable interest, and they have been extensively exploited for a wide variety of scientific and engineering applications ranging from attractive plasmonic [1, 2], sensitive biosensor devices [3, 4], phonics crystals to magnetic storage media [5, 6] and are the building blocks for a broad range of nanoelectronic devices such as MOSFET [7, 8], nanofluidics [9, 10], and optoelectronics devices [11, 12]

  • SiO2 film was deposited over the bulk silicon substrate using plasma-enhanced chemical vapor deposition (PECVD) followed by α-Si material thermally grown over the SiO2 layer using a rapid thermal processing (RTP) tool

  • Our results demonstrate that the novel approach has own excellent advantages compared with other nanofabrication techniques described far

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Summary

Introduction

Silicon-based nanostructures including Si and SiO2 are of great technological importance and considerable interest, and they have been extensively exploited for a wide variety of scientific and engineering applications ranging from attractive plasmonic [1, 2], sensitive biosensor devices [3, 4], phonics crystals to magnetic storage media [5, 6] and are the building blocks for a broad range of nanoelectronic devices such as MOSFET [7, 8], nanofluidics [9, 10], and optoelectronics devices [11, 12]. There have been a large number of fabrication techniques and methods to produce highly controlled silicon-based nanostructures using top-down or bottomup patterning strategies in the literatures [13,14,15]. As critical dimension (CD) continuously scales below 100 nm, some critical requirements, such as accurate control of CD, line edge roughness (LER), and etch uniformity, have been becoming more and more challenging [16, 17]. In this case, it is very difficult for PR as a direct etch mask to feature various nanostructures due to poor plasma etching resistances and thin PR thickness. For typical top-down fabrication such as 193-nm lithography or electron beam lithography, the thickness of PR is required to be as thin as possible in order to improve lithography resolution

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