A NOVEL METHODOLOGY FOR TEST SCENARIO GENERATION BASED ON CONTROL FLOW ANALYSIS OF UML 2.X SEQUENCE DIAGRAMS

Abstract

Now a days UML is widely used for preparing design documents. It helps to specify, construct, visualize and document artifacts of software systems. This paper presents an approach to test the software in the early stage (design phase) of software development life cycle, so that it can help the software testers in the later stages. This paper focuses on generating test scenarios from UML 2.x Sequence diagrams. The most challenging problem in generating test scenarios from UML 2.x sequence diagram is the presence of fragments such as alt, loop, break, par, opt etc. We propose an intermediate control flow graph in a testable form named Sequence Control Flow Graph (SCFG) resulting from the control flow analysis of UML 2.x sequence diagrams. We also propose a systematic approach named Sequence Test Scenario Generation Algorithm (STSGA) for generating test scenarios from UML 2.x Sequence diagrams. The test scenarios generated by our approach are suitable for detection of scenario faults, use case dependency and system testing.