Abstract
IC manufacturing process variations are typically expressed in terms of joint probability density functions (jpdf's) or as worst case combinations/corners of the device model parameters. However, since device models can only provide approximations to actual device behavior, the difference between the two being the modelling error only a part of the measured variation in device behavior can be modelled using device model parameter variations and the remaining appears as modelling error variation. In this paper we present a novel statistical parameter extraction methodology that accounts for the effect of modelling error on device model parameter statistics and can be used to quantify the statistical suitability of conventional MOS device models.
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