A Novel Method to Reduce Low-Frequency Output Current Ripple of PWM Inverters

Abstract

The output current of PWM inverters may contain low-frequency harmonics due to nonidealities, such as fluctuating dc voltage and dead-time. Low-frequency harmonics are detrimental to the inverter's current controller performance as well as its operation. They increase losses, cause synchronization problems in a grid-connected inverter, and cause torque pulsations in motors. Reducing low-frequency harmonics through conventional means require a big and expensive filter. In this article, a method to reduce low-frequency current harmonics is proposed. This method uses a virtual impedance, which is a controller block that mimics the behavior of a real impedance. Because it is virtual, it does not have physical drawbacks to the system, such as volume, weight, and losses. It can be designed only to affect the disturbance signals and to assume characteristics unlike a real impedance. It can also be added as a plug-in block to an already existing controller, saving a significant amount of design effort. Simulation and experimental results show a decrease of current THD to almost 1/3 of the original THD when no virtual impedance is used, demonstrating the effectiveness of the proposed method.