Abstract

In this paper we present a novel metamaterial-based antenna simulated using HFSS. The unit cell parameters were extracted using periodic boundary conditions and wave-port excitation. The metamaterial is magnetically coupled to the CPW line, the induced current in the hexagonal ring gives rise to a field perpendicular to the incident one. The antenna can be modeled by an LC circuit. This design achieves a significant impedance bandwidth of 8.47 GHz (S11 = − 10 dB from 72.56 GHz to 81.03 GHz), and a minimum return loss of − 40.79 dB at 76.89 GHz, which clearly indicates good impedance matching to 50Ω. The proposed antenna offers gains from 4.53 to 5.25 dBi, with radiation efficiencies better than 74%. Compactness, simple design layout, a novel design, and good radiation characteristics for this antenna are the main contributions of this work. The antenna can be built on top of a 300 µm thick silicon wafer, for application on HR-SOI-CMOS technology. When compared to other antenna designs for the same frequency band, the proposed antenna achieves very good performance. This design is suitable for the reception stage of long-range automobile radar systems, due to its wide HPBW, as well as E-band applications, such as backhaul systems.

Highlights

  • In this paper we present a novel metamaterial-based antenna simulated using HFSS

  • Notwithstanding, the majority of on-chip antenna developments have been made on SOI (Silicon-On-Insulator) substrates with high resistivity (HR) silicon, but achieving antenna gains in the range of − 3 to 3 dBi

  • We demonstrate that the proposed design has significant potential for on-chip radar systems, especially for the reception stage, due to its wide HPBW, high gain, small size and ease of fabrication

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Summary

Introduction

In this paper we present a novel metamaterial-based antenna simulated using HFSS. The unit cell parameters were extracted using periodic boundary conditions and wave-port excitation. On-chip antennas are good candidates for these systems, mainly due to their compact size, low power consumption and the possibility to fully integrate the RF front-end. It is well known, that bulk silicon with typical conductivities in the range 1–10 S/m for standard CMOS processes leads to very poor antenna performance, e.g., typical antenna gains of − 10 dBi, due to substrate ­losses[12]. Such low gain values are appropriate for short-range communications, up to one meter; typical applications are the high-data rate

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