Abstract
A Novel LDMOS with Ultralow Specific on-Resistance and Improved Switching Performance
Highlights
Power LDMOS is extensively applied to power integrated circuits because of its advantages of low switching losses, simple driving circuit, and easy integration [1,2,3,4]
This paper proposes a P/N SSTG SOI LDMOS, which has low-on-resistance and small switching losses
This is because the P/N SSTG SOI LDMOS introduces vertical channel and has high Nd-opt
Summary
Power LDMOS is extensively applied to power integrated circuits because of its advantages of low switching losses, simple driving circuit, and easy integration [1,2,3,4]. The oxide trench is introduced into the drift region to improve the contradictory relationship between Ron,sp and BV [9,10,11]. In the high-frequency field, dynamic losses account for the main part of the total losses At this time, it is important to make a tradeoff between Ron,sp and QGD. The SSGs connected to the source potential are located in the oxide trench of the N-drift region and are distributed in steps. The TG can modulate the current distribution, and the P strip and SSGs multidimensionally assist in depleting the N-drift region to make the Nd-opt relatively high, both of which effectively reduce Ron,sp. The proposed device achieves low-on-resistance and low switching losses without sacrificing much BV, and optimizes the tradeoff relationship between Ron,sp and QGD
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