A novel Josephson ternary multiplier

Abstract

A novel Josephson ternary logic circuit to perform multiplication is proposed. The fundamental circuit of the multiplier is based on Josephson complementary ternary logic circuit (JCTL). In this paper the principle of the ternary multiplier is described. We have fabricated the multiplier using SQUIDs which were made of Nb/AlOx/Al/Nb junctions, and measurements of the logic operation of the circuit were carried out. The results showed satisfactory operation of the multiplier, which agreed well with the results of simulation. The advantages of the proposed ternary multiplier are capability of ultra-high speed computation, low power consumption and very simple construction with less number of elements to perform a ternary multiplication.