Abstract
A novel inter coding framework for H.264/AVC is proposed to reduce the computational complexity of H.264 encoder on DSP platform. In this paper, inter coding for one P slice is separated into five consecutive loops: Motion Estimation Loop, Transform & Quantization Loop, Entropy Coding Loop, Deblocking Loop and Interpolation Loop. All the macroblocks (MBs) within one P slice are processed together in each loop. To further explore memory hierarchy of DSP platforms, MB-group based algorithms are introduced in each loop to reduce frequent data transfers between external memory and internal memory. Finally, the proposed method is implemented on TMS320DM6446 platform and experimental results show that, for the video sequences with CIF (Common Intermediate Format) format, the optimized H.264 encoder can achieve the encoding speed of 24 frames per second, which fully meet the real-time requirements of the applications.
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