A Novel High-Performance Poly-Silicon Thin-Film Transistor With a Double-Channel Structure

Abstract

In this letter, a novel double-channel polycrystalline-silicon (poly-Si) thin-film transistor (DCTFT) is proposed and demonstrated. The DCTFT, which includes two channels with a thicker source/drain (S/D) region, a field-induced drain, and an offset structure, reveals better device performance and lower S/D resistance. Our experimental results show that the on-current of the DCTFT is higher than that of the conventional structure, and the leakage current is greatly reduced simultaneously. In addition, the device stability such as the threshold-voltage shift under a high gate bias is also improved by this two-channel and thick-S/D-region structure design. The lower drain electric field of the DCTFT is also a benefit to the device scaling down for better performances.