A Novel Highly Linear Voltage-To-Time Converter (VTC) Circuit for Time-Based Analog-To-Digital Converters (ADC) Using Body Biasing

Ahmed Elgreatly,Ahmed Dessouki,Hassan Mostafa,Rania Abdalla,El-sayed El-Rabaie

doi:10.3390/electronics9122033

Ahmed Elgreatly, Ahmed Dessouki + Show 3 more

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https://doi.org/10.3390/electronics9122033

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Abstract

Time-based analog-to-digital converter is considered a crucial part in the design of software-defined radio receivers for its higher performance than other analog-to-digital converters in terms of operation speed, input dynamic range and power consumption. In this paper, two novel voltage-to-time converters are proposed at which the input voltage signal is connected to the body terminal of the starving transistor rather than its gate terminal. These novel converters exhibit better linearity, which is analytically proven in this paper. The maximum linearity error is reduced to 0.4%. In addition, the input dynamic range of these converters is increased to 800 mV for a supply voltage of 1.2 V by using industrial hardware-calibrated TSMC 65 nm CMOS technology. These novel designs consist of only a single inverter stage, which results in reducing the layout area and the power consumption. The overall power consumption is 18 μW for the first proposed circuit and 15 μW for the second proposed circuit. The novel converter circuits have a resolution of 5 bits and operate at a maximum clock frequency of 500 MHz.

Highlights

Analog-to-digital converter (ADC) is considered the link between the real world, represented by real-time analog signals, and the digitized world, represented by digital integrated circuits, microprocessors and microcontrollers
These limitations led to the design of the time-based analog-to-digital converter (T-ADC)
The proposed voltage-to-time converter (VTC) circuits are simulated using Cadence Virtuoso with industrial hardware-calibrated 65 nm transistor device models provided by TSMC

Summary

Introduction

Analog-to-digital converter (ADC) is considered the link between the real world, represented by real-time analog signals (speech, radar, medical imaging, etc.), and the digitized world, represented by digital integrated circuits, microprocessors and microcontrollers. Recent ADC architectures are facing many serious limitations due to CMOS technology scaling [1]. One of these limitations is the degradation of the signal-to-noise ratio (SNR) due to the reduction of the supply voltage. The dynamic range of analog input signal is reduced as the threshold voltage is not affected by the continuous scaling of CMOS transistors. These limitations led to the design of the time-based analog-to-digital converter (T-ADC).

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