A Novel High Speed Full Adder Based on Linear Threshold Gate and its Application to a 4-2 Compressor

Abstract

This paper proposes a novel full adder based on the linear threshold gate (LTG) which belongs to the single-electron-device (SED) family. The advantage of an LTG-based circuit is that it has a satisfactory fan-out as opposed to other SED-based circuits; hence, it can be utilized in any complex circuit network. The proposed full adder is utilized as an application in a 4-2 compressor architecture. Compressors are elementary building blocks which are widely used in arithmetic structures such as multipliers. The proposed 4-2 compressor can operate reliably in any tree structured parallel multiplier due to its high performance full adders. The SIMON simulator demonstrates the correct operation of the proposed full adder design, along with the presented 4-2 compressor. The performance of proposed full adder and the 4-2 compressor, in terms of delay and power consumption, are calculated in complete detail. The comparisons indicate that the proposed full adder has the highest speed in comparison with the previous high speed designs.