A novel high figure-of-merit SOI SJ LDMOS with ultra-strong charge accumulation effect**Project supported by the National Natural Science Foundation of China (Nos. 61176069, 61376079) and the Program for New Century Excellent Talents in University of Ministry of Education of China (No. NCET-11-0062).

Abstract

A novel silicon-on-insulator (SOI) super-junction (SJ) LDMOS with an ultra-strong charge accumulation effect is proposed. It has two key features: an assisted-accumulation trench-type extending gate (TEG) with a high-k (HK) dielectric and a step-doped N pillar (TEG-SD SJ LDMOS). In the on-state, electrons accumulate at the sidewall of the HK dielectric from the source to the drain by the TEG. Furthermore, the high permittivity of the HK dielectric leads to an ultra-strong charge accumulation effect. As a result, an ultra-low resistance current path is formed. The specific on-resistance (Ron, sp) is thus greatly reduced and is independent of the drift doping concentration. In the off-state, the step-doped N pillar effectively suppresses the substrate-assisted depletion effect by charge compensation. Moreover, the reshape effect of the HK dielectric and the new electric field (E-field) peak introduced by the step-doped N pillar enhance the drift region E-field. Hence, the BV is improved. Simulation indicates that the TEG-SD SJ LDMOS achieves an extremely low Ron, sp of 1.06 mΩ·cm2 and a BV of 217 V. Compared with the conventional SJ LDMOS, the TEG-SD SJ LDMOS decreases the Ron, sp by 77.5% and increases the BV by 33%, exhibiting a high figure of merits (FOM = BV2/Ron, sp) of 44 MW/cm2.