A Novel Fault Current Limiter for MMC-Based HVDC System

Abstract

In the modular multilevel converter (MMC)-based HVDC system, the fault current rises rapidly when a dc side fault occurs. To avoid the damage to the semi-conductors, fault current limitation is necessary. For the fault current limiter proposed in this paper, the current flows through the thyristers in the normal operation state, while it will flow through the current limiting resistors due to the turning off of the thyristers by the commutation capacitor when a dc fault occurs. To provide theoretical basis to the choice of the main parameters of the fault current limiter, this paper analyzed the current of every branch in the fault current limiter. The simulation results of the model built in PSCAD/EMTDC verified the correctness of the theoretical analysis and the effectiveness of the proposed fault current limiter.