Abstract
A novel empirical model capable of predicting dc current and RF capacitance characteristics for CMOS Schottky diodes is first proposed. The model is developed upon a physical-based equivalent circuit and a set of closed-form formulas. Different current transport mechanisms including thermionic emission, tunneling, and carrier velocity saturation are counted by nonlinear resistances in the intrinsic model, while stray and substrate parasitic effects are also included in the parasitic model. A systematic procedure is built up to directly extract all the model parameters from measurements. The model is validated in 65- and 130-nm CMOS technology, and the modeled results show an excellent agreement with the measured data up to 67 GHz, which is the highest modeling frequency reported up till now.
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