A Novel Double-RESURF SOI-LIGBT With Improved $V_{\mathrm{\scriptscriptstyle ON}}-{E}_{ \mathrm{\scriptscriptstyle OFF}}$ Tradeoff and Low Saturation Current

Abstract

A novel double-reduced surface field technique (RESURF) insulated gate bipolar transistor based on lateral insulated gate bipolar transistor based on silicon-on-insulator (SOI-LIGBT) with deep-trench-cathode and self-biased pMOS is proposed and investigated by numerical simulation. The proposed SOI-LIGBT remarkably features a deep trench, a self-biased pMOS, a carrier stored layer (n-CS), and p-shield region at the cathode side. Thanks to the n-CS, the proposed device achieves a low ON-state voltage ( ${V}_{ \mathrm{\scriptscriptstyle ON}}$ ). And the doping concentration of the n-CS ( ${N}_{\text {CS}}$ ) has almost no impact on the breakdown voltage (BV). Benefited from the self-biased pMOS, the proposed device shows low saturation current and extended short-circuit current withstand-time. In addition, the proposed structure achieves a low turn-off loss ( ${E}_{ \mathrm{\scriptscriptstyle OFF}}$ ). Simulation results reveal that, compared with the conventional double-RESURF SOI-LIGBT, the proposed structure achieves 15% ${V}_{ \mathrm{\scriptscriptstyle ON}}$ reduction and 50% saturation current reduction. In addition, the proposed device can sustain the short circuit current for 90% longer time than the conventional double-RESURF SOI-LIGBT.