A Novel Design and Implementation of FBMC Transceiver for Low Power Applications

Mohamed Saber

doi:10.52549/ijeei.v8i1.1711

Abstract

The complex structure of the Filter Bank Multicarrier (FBMC) communication system is the main drawback affecting the performance of the system and causes a high-power consumption. The complexity arises from using a polyphase filter bank, which consists of fast Fourier Transform/ Inverse Fast Fourier Transform (FFT/IFFT) processors and a filter bank of Finite Impulse Response (FIR) filters. This paper presents the analysis and the implementation of a new design model for FBMC transceiver in which the polyphase filter is removed completely in both transmitter and receiver and uses instead of it, a multi-level cascaded structure of FIR subfilters. The coefficients of each subfilter selected using an optimization algorithm to minimize the amplitude of sidelobes compared to the amplitude of the main lobe in the frequency response of the subfilter. The proposed design reduces the number of multiplications compared to the conventional design by 65%. The field-programmable gate array (FPGA) implementation results indicate that the proposed architecture saves 24% of resources of the FPGA board, works faster, and saves 27% of power consumption compared to conventional FBMC transceiver.

Highlights

Filter Bank Multicarrier (FBMC) is a digital multicarrier modulation technique; it provides many advantages such as reduction of inter symbolic interference (ISI) and intercarrier interference (ICI) that may introduce when using channels with varying gain in their frequency band [1,2,3]
The complexity arises from using a polyphase filter bank, which consists of fast Fourier Transform/ Inverse Fast Fourier Transform (FFT/IFFT) processors and a filter bank of Finite Impulse Response (FIR) filters
The field-programmable gate array (FPGA) implementation results indicate that the proposed architecture saves 24% of resources of the FPGA board, works faster, and saves 27% of power consumption compared to conventional FBMC transceiver

Summary

Introduction

FBMC is a digital multicarrier modulation technique; it provides many advantages such as reduction of inter symbolic interference (ISI) and intercarrier interference (ICI) that may introduce when using channels with varying gain in their frequency band [1,2,3]. Conventional FBMC transceiver, which depends on polyphase filters shown, consists of an offset quadrature amplitude modulation (OQAM) modulator, followed by a synthesis filter bank (SFB) in the transmitter. In the receiver, it has an analysis filter bank (AFB) and an OQAM demodulator [5]. All filters output summed to form the transmitter signal while PPN in AFB in the receiver consists of delay units, down-samplers (N/2), N FIR filters, and FFT processor. For FBMC transceiver, implementation of FFT, IFFT, and FIR filters requires a large number of multipliers and adders, Journal homepage: http://section.iaesonline.com/index.php/IJEEI/index

Methods

Results

Conclusion