Abstract
The semiconductor industry is now facing challenges to keep pace with Moore’s law and this leads to the requirement of new materials and newer technological devices. Molecular switch-based nanodevices are one of the promising areas because of their ultimate size and miniaturisation potential. These nanodevices are built through a self-assembled bottom-up manufacturing method in which the possibility of external intervention is negligible. This leads to a considerable yield loss due to defective device production and the traditional test-and-throw faulty device approach will not hold well. Design of fault-tolerant devices are the only possible solution. A widely studied nanodevice is nanocrossbar architectures and their fault tolerance can be designed by exploiting the programmable logic array’s fault tolerance schemes. A defect-unaware fault tolerance scheme is developed in this work based on the bipartite graph analogy of crossbar architectures. The newly-designed algorithm can eliminate more than one node in each iteration and, hence, a defect-free subcrossbar can be obtained much faster compared to the existing algorithms. A comparison with the existing defect-unaware fault-tolerant methods with this newly-developed algorithm shows a better yield in most of the cases.
Highlights
With increased counts, transistors were able to operate at higher frequency until recently, and the “performance at any cost” tactic will soon lead to fundamental thermal limits of an integrated circuit (IC), approaching its end [1]
Defects that occur during the fabrication process are permanent faults, and in the case of molecular switching devices these may occur as a structural differences in the molecule
Stuck-at-on fault: These defects make the corresponding switch constantly conduct electric current or, in case of a molecular switch, their geometry is permanently stuck in the metastable state co-conformer (MSCC) state
Summary
Transistors were able to operate at higher frequency until recently, and the “performance at any cost” tactic will soon lead to fundamental thermal limits of an integrated circuit (IC), approaching its end [1]. Most of these nano electronic devices possess a regular array-like structure generated by a stochastic bottom-up assembly In this method, individual components are built first and the design is assembled onto it. Defects that occur during the fabrication process are permanent faults, and in the case of molecular switching devices these may occur as a structural differences in the molecule. Stuck-at-off : These type of defects makes the corresponding crosspoint switch not capable of conducting electrical current or, in the case of a molecular switch, the molecule can possess only its ground state co-conformer (GSCC) geometry. Stuck-at-on fault: These defects make the corresponding switch constantly conduct electric current or, in case of a molecular switch, their geometry is permanently stuck in the metastable state co-conformer (MSCC) state. Our previous studies presented a detailed analysis on these type of faults [9] and in this paper we are concentrating only on the fault tolerance method for stuck-at faults
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