A novel CML latch for ultra high speed applications

Abstract

An ultra high speed current mode logic (CML) latch is proposed in this paper. The latch uses an NMOS transistor controlled by clock signal to improve the tail current of the latching branch, so as to improve the speed of the latch. In 0.13µm CMOS technology, the divide-by-four frequency divider composed of the proposed CML latch can work under the maximum frequency of 15.2GHz, which is almost the twice of the conventional CML latch. Simultaneously, the proposed CML latch consumes only 1.3% more power than the conventional one, realizing a good compromise between speed and power.